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1 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary general description EM73475 is a highly-integrated digital answering machine controller in which control function and signal amplification capability are integrated into a monolithic device. the emc em73400 based 4-bit controller contains 4k-byte rom, 244-nibble ram, 5 interrupt sources, a melody generator, two 12-bit timer/counters, a time-based interrupt and 14 general purpose i/o pins to provide interfaces with keyboard, led display, daa circuit, tape mechanism and dtmf detection circuit etc. total component counts and production cost can therefore be reduced. the linear amplifier portion combines all necessary amplifiers with automatic level control function for signal amplification and conditioning, analog switches and digital attenuator, designed to provide the most integrated design for the single deck tape-based telephone answering device applications. features 4-bit controller of EM73475 is based on emc em73400 family which provides: ? operating voltage : 4.5 to 5.5 v. (system clock frequency : 3.58 mhz). ? clock source : single clock system available for resonator or crystal and external clock source by mask option. ? instruction set : 108 powerful instructions with cycle time of less than 2.2 m s (fosc=3.58mhz) ? rom capacity : 4k x 8 bits. ? ram capacity : 244 x 4 bits. ? input port : 2 port (3 bits) port 12 : schmitt trigger. (sch1, sch2) port 14/ (wakeup) : pull up resistor and sleep/hold releasing function are available by mask option. ? i/o port : 5 ports (19 bits) port 1, 2 : r-option, push-pull or nmos open drain, high current output for driving led. port 7 : push-pull or open drain available by mask option. port 8,9 : initial high/low, push-pull or open drain available by mask option. ? 12-bit timer/counters : two 12-bit timer/counters are programmable for timer, event counter, or pulse width measurement mode. ? built-in time base : 8 kinds of frequencies. ? subroutine nesting : up to 13 levels. ? interrupt : external ... 2 input interrupt sources. internal .... 2 timer overflow interrupts. 1 time base interrupt. ? power saving function : sleep function, cpu hold internal state and stop oscillating. hold function, cpu hold internal state and oscillator still working. ? data pointer (dp) : data conversion or table look-up. ? built-in melody : programmable melody generator. built-in amplifiers for telephone answering device application. ? scf based with full dtmf detection for remote control. ? pre-amplifier for tape head, microphone, telephone line signal amplification ? automatic level control to accommodate wide range of signal amplitude ? differential output type power amplifier drive speaker directly. ? lineo amplifier, speaker amplifier buffer and mute function. ? sixteen stage digital attenuator for implementing digital volume control with no extra cost. ? complete set of analog switches configurable for all operation modes required by tad applications. ? package : sdip 42. EM73475 telephone answering device controller
2 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary pin assignment functional block diagram digital circuit interrupt control time base timer/counters system control instruction decoder rom ir pc reset control clock generator timing generator sleep control hr lr acc alu flag zc s g stack ram analog circuit i/o port control reset xin wakeup xout 2 channels sp dp t1 t0 melody p1 p2 p7 p8 vdd vss ampnf ampo alc reco lineo gs dtmfin pvdd vo1 pvss vo2 vss p1.0 p1.1 p1.2 p1.3 p7.0 p7.1 p2.0 p2.1 p2.2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 linei mic head vref vdda melody heras phodet vdd p9.2 p9.1 p9.0 p8.3 p8.2 p8.1 p14.0 reset xout xin test p2.3 EM73475 s-dip
3 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary analog circuit p10, p11, p13 control switches alc reco head linei mic alc ampnf ampo digital volume control p30.0 heras lineo vref vdda sw7 sw6 sw8 sw1 sw2 sw3 sw4 sw5 vox buf line amp sch1 sch2 vdda vssa gs dtmfin com amp pre amp rec amp p12 att. mute circuit muterc res attenuating circuit vo2 vo1 power amp. pvss pvdd - + vref pre amp. dtmf receiver remote code number p6 x2.5 x1.5
4 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary pin descriptions symbol function vdda, vssa power supply (+, -) for analog circuit. *sch1,*sch2 schmitt trigger 1, 2. pvdd, pvss power supply (+,-) for power amplifier. vo1, vo2 audio signal output to speaker for differential output, direct drive speaker. lineo audio signal output to telephone line. alc automatic level control adjustment pin. (r=68k, c=22 m f is connected to vssa) ampo the com-amplifier output. ampnf the negative feedback input of com-amplifier. vref analog circuit reference voltage output. mic microphone input. linei telephone line input. head play head signal input. reco audio signal output for recording in record mode, otherwise it presents a high impedance state. heras erase bias current output. *res set the noise level of mute function for active and deactive threshold. (r=50k~180k is connected to vref) *muterc set the mute active response time adjustment pin. (r=560k~820k, c=1 m f is connected to vssa) note : the rc time constant of mute function must be designed at the value that large than the rc time constant of alc function. melody melody generator output pin. dtmfin dtmf signal input with the negative feedback input of amplifier. gs gain select and dtmf-amplifier output. vdd, vss power supply (+, -) for digital circuit. p1.0 ~ p1.3 i/o port with high current sink nmos for directly driving leds p2.0 ~ p2.3 mask option : r-option enable, push-pull or open drain. p7.0, p7.1 general purpose i/o ports. *p7.2, *p7.3 mask- option : push-pull or open drain. p8.0(int1) i/o port. p8.0 with external interrupt (int1) input. p8.1(trgb) (initial : p8.1 with timer 1 external pin (trgb). p8.2(int0) high/low active) p8.2 with external interrupt (int0) input. p8.3(trga) p8.3 with timer 0 external pin (trga). mask option : push-pull or open drain, initial high/low active. p9.0 ~ p9.2 general purpose i/o ports. mask option : push-pull or open drain, initial high/low active. xin, xout oscillator (or resonator) input/output. for external clock input, xin is used and xout is left open. reset system reset input, active low internal pull up or none by mask option. test no connection, reserved for testing. wakeup 1-bit input pin shared with wakeup pin. mask option : internal pull up or none. * : not available for s-dip 42
5 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary function descriptions the controller of EM73475 is based on emc em73400 family 4-bit controller. for detailed function description of the controller, please refer to specifications of em73400 series single clock 4-bit controller and 4-bit controller programming guide. the following is a brief description of EM73475 function blocks. memory configuration program rom the 4k bytes of rom can be used to store users program, constants, look-up-tables, and conversion tables, etc. it can be divided into 5 sections. a. address 000h : reset start address. b addresses 002h - 00ch : 5 interrupt service entry addresses. c. addresses 00eh - 086h : scall subroutine entry addresses. d. addresses 0000h-07ffh : lcall subroutine entry address. e. address 0000h - 0fffh : the data pointer (dp) to indicate to rom address, then to get the rom code data. f. addresses 000h - 0fffh : any section other than the above can be used for users program code and constants. flags there are 3 kinds of flag, cf (carry flag), zf (zero flag) and sf (status flag), these 3 1-bit flags are affected by arithmatic, logic and comparative ... operation. all flags will be put into stack when an interrupt subrountine is served, and the flags will be restored after rti instruction executed. data ram there is total 244-nibble data ram from 00h to f3h which is divided into 6 parts: a. addresses 00h - 0fh : zero page region. b. addresses 0c0h - 0f3h : stack region. c. addresses 0f4h - 0fah : timer region. d. addresses 0fbh - 0feh : data pointer (dp) region. e. address 0ffh : stack pointer region. f. addresses 00h - 0f3h : data area. interrupt function the EM73475 provides 5 interrupt sources: a. time base interrupt (tbi). b. timer 0 overflow interrupt (trga). c. timer 1 overflow interrupt (trgb). d. external interrupt (int0). e. external interrupt (int1). i/o port configuration the data transfer with external circuits and the command/status/ data transfer with the internal circuit are performed by executing i/o instructions. there are 4 types of ports: a. i/o port: : data transfer with external circuit. b. command port: : control of internal circuit. c. status port: : status of internal circuit. d. data register: : data transfer with internal circuit.
6 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary name type function external i/o ports p1 i/o general purpose i/o. led low nibble output with r-option. p2 i/o general purpose i/o. led high nibble output with r-option. p7 i/o general purpose i/o. p8 i/o general purpose i/o. p9 i/o general purpose i/o. p14 input cpu status. internal i/o ports p6 data input remote control code input port. p10 control analog switch control port. p11 control analog switch control port. p12 status status monitor port . p13 control volume control port. p15 control dtmf validity lenght and int1 trigger type control port p16 control sleep control port. p20.3 control r-option control port. p23 control low nibble control port of melody generator. p24 control high nibble control port of melody generator. p25 control time base interrupt control port. p28 control timer/counter 1 control port. p29 control timer/counter 2 control port. p30 control melody, erase head and vox sensitivity selection control port. external i/o ports p1.0 ~ p1.3, p2.0 ~ p2.3 type : i/o ports. mask option : r-option, push-pull or nmos open drain type. applicable instructions : tfp p, b; ttp p, b; sep p, b; clp p, b; ina p; inm p; outa p; outm p; out #k, p. function : port 1 and port 2 are both 4-bit i/o ports with high current sink nmos to drive leds. p7.0 ~ p7.3 type : i/o ports. mask option : push-pull or nmos open drain type. applicable instructions : tfp p, b; ttp p, b; sep p, b; clp p, b; ina p; inm p; outa p; outm p; out #k, p, clpl, sepl, tfpl. function : 4-bit general purpose i/o ports. each pin of p6 and p7 can be set, cleared and tested by instruction of sepl, clpl and tfpl which is specified by l register. the relation of l register with p6 and p7 is as below: lr = c ? p7.0 lr = d ? p7.1 lr = e ? p7.2 lr = f ? p7.3
7 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary r-option function the ports p1, p2 are equipped with r-option which provide extra for i/o pins. for example, it can be used as a normal i/o pin as firmware option. when the r-option is disabled, the i/o pin is a normal i/o pin. when the r-option function is enabled, this i/o pin can be used as an input pin to detect external status of this pin. the structurs of the i/o pin with r-option function is presented below : r-option provides the hi-impedance function for output driver and use the weak pmos to pull up. when the r-option control signal p20.3 is high (r-option disabled), the weak pmos is turned off and the output data latch is in the normal mode. in this case, there are two options (push-pull, open-drain) for this i/o pin. when the r- option control signal p20.3 is low (r-option enabled), the weak pmos turns on and the driver of output data latch presents a hi-impedance state. in this case, the external r-option status can be detected as low when this pin connects through a 560k w external resistor to gnd, high when this pad is open. p8.0/int1; p8.1/trgb; p8.2/int0; p8.3/trga type : i/o port with hysteresis type inputs. mask option : initial high/low active, push-pull or nmos open drain type. related instruction : tfp p, b; ttp p, b; sep p, b; clp p, b; ina p; inm p; outa p; outm p; out #k, p. function : port 8 is a 4-bit i/o port with special interrupt and timer/counter inputs. p8.0/int1 and p8.2/int0 can be the external interrupt input pins for int1 and int0; p8.1/trgb, p8.3/trga can be the external timer/counter inputs for timer 1 and timer 0, respectively. int1 accepts falling edge and both edge trigger determined by internal command port p15.3. pad weak pmos r-option control signal output data latch output data input data push-pull open-drain mask option r-option mask option 560k p8 bit 3 bit 2 bit 1 bit 0 1/0 1/0 1/0 1/0 initial value trga int0 trgb int1 p15 bit 3 bit 2 bit 1 bit 0 1 * * * initial value int1t * * gt int1t ( int1 trigger type) 0 : both edge trigger 1 : falling edge trigger gt (guard time adjustment) ; see page 13
8 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary p9.0~p9.2 type : i/o port with hysteresis type inputs. mask: option : initial high/low active, push-pull or nmos open drain type. applicable instruction : tfp p, b; ttp p, b; sep p, b; clp p, b; ina p; inm p; outa p; outm p; out #k, p. function : port 9 is a 3-bit i/o port. p9 bit 3 bit 2 bit 1 bit 0 * 1/0 1/0 1/0 initial value wakeup/p14.0 type : input port with hysteresis type input. mask option : pull-up resistor or none. function : input pin for releasing sleep condition (active high). p14 bit 3 bit 2 bit 1 bit 0 * * * 1 initial value * * * sleep internal command i/o ports analog switches control ports (p10 and p11) p10 and p11 control the on/off state of internal analog switches and can be configured to any mode as demanded by applications. all switches are initialized to "0" during reset. these two ports can be set, cleared and tested for each bit as specified by "set"or "clr" instructions. state port name description 0 1 p10.3 sw1 record amplifier output path off on p10.2 sw2 head input path off on p10.1 sw3 linei input path off on p10.0 sw4 mic input path off on p11.3 sw5 alc comparator path off on p11.2 sw6 audio path to digital attenuator off on p11.1 sw7 audio path to line buffer off on p11.0 sw8 attenuate audio signal off on
9 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary examples: a) icm record mode: this mode is used to record the incoming messages through telephone line. port name p10 p11 bit number bit 3 bit 2 bit 1 bit 0 bit 3 bit 2 bit 1 bit 0 content 1 0 1 0 1 1 0 0 b) icm playback mode: this mode is used to remotely play back the incoming messages. port name p10 p11 bit number bit 3 bit 2 bit 1 bit 0 bit 3 bit 2 bit 1 bit 0 content 0 1 0 0 0 1 1 0 c) ogm out mode: this mode is for playing ogm to the calling party via telephone line. port name p10 p11 bit number bit 3 bit 2 bit 1 bit 0 bit 3 bit 2 bit 1 bit 0 content 0 1 0 0 0 1 1 0 d) ogm change mode: this mode is intended for changing the ogm with a remote phone. port name p10 p11 bit number bit 3 bit 2 bit 1 bit 0 bit 3 bit 2 bit 1 bit 0 content 1 0 1 0 1 1 0 0 status monitor port (p12) the internal input port p12 reflects the status of vox, sch1 and sch2 inputs. the bit 2 of p12 is vox (voice signal detection bit), bit 1 is sch1 (schmitt trigger 1) and bit 0 is sch2 (schmitt trigger 2). p12 bit 3 bit 2 bit 1 bit 0 1 1 1 1 initial value std vox sch1 sch2 vox signal detection bit 0 : the voltage of ampo pin 3 v ref +voxt2. 1 : the voltage of ampo pin v ref -voxt1. user can select among four sets of voxt1 and voxt2 based on the requirements of the applications. for further details, please refer to the descriptions in the paragraph of vox sensitivity control port (p30.3, p30.2) of this document. sch1 bit 0 : sch1 pin is > 0.7 v dd . 1 : sch1 pin is < 0.3 v dd . sch2 bit 0 : sch2 pin > 0.7 v dd . 1 : sch2 pin < 0.3 v dd . std pin : delayed steering input; see page 13
10 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary wurm (wake-up release mode ) * 0 : reserved. 0 1 : wake-up in edge release mode. 1 1 : wake-up in level release mode. wuwt (wake-up warm-up time ) 0 0 : 2^18 / xin. 0 1 : 2^14 / xin. 1 0 : 2^16 / xin. 1 1 : zero warm-up time for external clock mode. int1 trigger type control port (p15.3) int1 accepts falling edge or both edge trigger controlled by internal command port p15.3. it is useful for tape positioning and tape-end detection function. p15 bit 3 bit 2 bit 1 bit 0 1 * * 0 initial value int1t * * gt int1t ( int1 trigger type) 0: both edge trigger 1: falling edge trigger digital volume control port (p13) the port p13 controls the level of audio signal output to power anplifier. programming p13 to be 0000b to get the maximum, and 1111b to get silence. p13 bit 3 bit 2 bit 1 bit 0 0 0 0 0 initial value st8 st4 st2 st1 the audio signal output level is attenuated as follows: stage 0 0000 : 0 db stage 8 1000 : -18.7 db stage 1 0001 : - 2.3 db stage 9 1001 : -21.1 db stage 2 0010 : - 4.6 db stage 10 1010 : -23.5 db stage 3 0011 : - 6.9 db stage 11 1011 : -26.2 db stage 4 0100 : - 9.2 db stage 12 1100 : -28.5 db stage 5 0101 : -11.5 db stage 13 1101 : -31.0 db stage 6 0110 : -13.9 db stage 14 1110 : -33.5 db stage 7 0111 : -16.3 db stage 15 1111 : silence sleep control port (p16) p16 bit 3 bit 2 bit1 bit0 1 * 1 1 initial value wurm wuwt
11 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary melody generator control port (p23, p24 and p30.1) the melody generator consists of a xin/2^5 clock source (if xin = 3.58 mhz, the clock source is 112 khz) and a 8-stage programmable binary counter. the internal ports p23 and p24 control low-nibble and high-nibble of the counter respectively. the contents of p23 and p24 will be loaded into programmable counter auto- matically when outa p23 or outm p23 instruction is executed. bit 1 of p30 controls on/off of melody generator. p23 bit 3 bit 2 bit 1 bit 0 0 0 0 0 initial value p24 bit 7 bit 6 bit 5 bit 4 0 0 0 0 initial value xin by 2^5 programmable counter by 2 memory p30.1 p24 p23 p30.1 ?? ? ? --- - p30 bit 3 bit 2 bit 1 bit 0 * 1 1 initial value * dimld diehd dimld : melody generator enable/disable bit 0 = enable 1 = disable note : a) if dimld bit is "1" the melody generator is disabled and the melody pin is switched to "low" level; if the b7 to b0 are 00000000 and dimld is 0, the melody pin is switched to "high" level, otherwise the melody pin will issue melody tone. b) the melody frequency = xin / 2^5 /(b7, b6, b5, b4, b3, b2, b1, b0)/2
12 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary p25 bit 3 bit 2 bit 1 bit 0 interrupt frequency 0 0 0 0 initial value 0 0 * interrupt disabled 0 1 0 0 xin/2^10=3496 hz 0 1 0 1 xin/2^11=1748 hz 0 1 1 0 xin/2^12=874 hz 0 1 1 1 xin/2^13=437 hz 1 * reserved for xin = 3.58 mhz timer/counter 0, timer/counter 1 control ports (p28, p29) the p28 and p29 control the operating modes of timer/counter 0 and timer/counter 1 respectively. p28 bit 3 bit 2 bit 1 bit 0 0 0 0 0 initial value tms0 ips0 p29 bit 3 bit 2 bit 1 bit 0 0 0 0 0 initial value tms1 ips1 time base interrupt control port (p25) the time base can be used to generate a fixed frequency interrupt. 4 frequencies are available which can be selected by setting p25 as follows: the timer/counters can be configured to operate in one of three modes: a. event counter. b. timer. c. pulse-width measurement. tms (timer/counter mode selection) 0 0 stop. 0 1 event counter mode. 1 0 timer mode. 1 1 pulse width measurement mode. ips (internal pulse-rate selection) 0 0 xin/2^10 hz 0 1 xin/2^14 hz 1 0 xin/2^18 hz 1 1 xin/2^22 hz
13 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary dtmf remote code input port (p6) and delayed steering input (p12.3) dtmf input key p12.3 port 6 f-low f-high number std bit 3 bit 2 bit 1 bit 0 697 1209 1 0 0 0 0 1 697 1336 2 0 0 0 1 0 697 1477 3 0 0 0 1 1 770 1209 4 0 0 1 0 0 770 1336 5 0 0 1 0 1 770 1477 6 0 0 1 1 0 852 1209 7 0 0 1 1 1 852 1336 8 0 1 0 0 0 852 1477 9 0 1 0 0 1 941 1209 * 0 1 0 1 0 941 1336 0 0 1 0 1 1 941 1477 # 0 1 1 0 0 697 1633 a 0 1 1 0 1 770 1633 b 0 1 1 1 0 852 1633 c 0 1 1 1 1 941 1633 d 0 0 0 0 0 xx x 1 xxxx x : don't care. std (p12.3) : delayed steering input. (internal port) p15 bit 3 bit 2 bit 1 bit 0 1 * * 0 initial value int1t * * gt gt (gtp : guard time present; gta : guard time absent) timing diagram ; see page 17 0 : 20 ms 1 : 30 ms std t psed t pq t gtp t gta p6 st/gt t dp t rec t rec t da t do t id est dtmfin tone#n tone#n+1 tone#n+1 decode tone#n-1 decode tone#n+1 decode tone#n
14 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary vox sensitivity, melody, erase-head control port (p30) the voxlvl1, voxlvl0 bits control sensitivity of vox schmitt trigger. the user can select the required sensitivity among 4 levels available based on the needs of the applications. p30 bit 3 bit 2 bit1 bot 0 name voxlvl1 voxlvl0 dimld diehd initial value 1 1 1 1 sensitivity voxlvl1 voxlvl0 voxt1 voxt2 1 1 vref-0.4 vdc vref+0.4vdc 1 0 vref-0.3 vdc vref+0.3vdc 0 1 vref-0.15 vdc vref+0.15vdc 0 0 vref-0.1 vdc vref+0.1vdc mute function mask option : enable or disable mute function. function : when the mute function is enabled, the EM73475 supports the noise- reduced function. this function is designed to suppress (mute) the white noise at the duration of silence in message play mode. the suppressing level and suppressing active response time can be tuned by res pin and muterc pin. when the mute function is disabled, the res and muterc pins must be open.
15 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary absolute maximum ratings items sym. rating condition supply voltage v dd -0.3 to 6 v input voltage v in -0.3 to v dd +0.3 v output voltage v o -0.3 to v dd +0.3 v output current i o 30 ma port p1 and p2 3.2 ma port p6, p7, p8, p9, melody power dissipation p d 300 mw t opr =50 c operating temperature t opr 0 to 50 c storage temperature t str -50 to 125 c electrical characteristics (v ss = 0v, v dd = 5.0 v, fosc=3.58 mhz unless otherwise noted) parameter sym. min. typ. max. unit condition supply voltag v dd 4.5 5 5.5 v input voltage v ih 0.8 - 1 v il 0 - 0.2 v dd v dd =4.5v ~ 5.5v supply current i dd - 10 15 ma normal mode, fosc=3.58mhz i dd s -5 m a sleep mode v dd = 5.5v, no load input current i ih --2 m a test, reset & wakeup pins without pull up/down resistor input current i il - - 2 ma push-pull output pin,v dd =5.5v, v in = 0.4v input resistance r in 100 220 450 kohm reset, v dd = 5.5v 30 70 150 wakeup, v dd = 5.5v open drain output pin i lk - 0.01 2 m av dd = 5.5v, v out = 5.5v leakage current melody output current i moh 0.5 - - ma v dd = 4.5v, v mo = 4.0v i mol 0.5 - - v dd = 4.5v, v mo = 0.5v p1, p2, p7, p8, p9 output voltage v oh 2.4 - - v v dd = 4.5v, i oh = 200 ua p7, p8, p9 output voltage v ol - - 0.4 v dd = 4.5v, i ol = 1.6 ma p1, p2 output voltage v ol - - 1.2 v v dd = 4.5v, i ol = 20 ma
16 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary electrical characteristics (v ss = 0v, v dd = 5.0 v, fosc=3.58 mhz unless otherwise noted) parameter sym. min. typ. max. unit condition op-amp general specification power supply rejection ratio psrr - 60 - db dc open loop voltage gain avol - 65 - db open loop unit gain bandwidth fc - 1.5 - mhz output voltage swing vo - 1.6 - vpp alc on vo - - 3.0 vpp alc off pre-amplifier specification voltage gain for line1 input gainl 9 9.5 10 db voltage gain for mic input gainm 19.5 20 20.5 db voltage gain for head gainh 31 32 33 db com-amplifier specification voltage gain gainc 49 50 51 db note 1 com-amp output voltage vpre 470 550 620 mvrms note 1 with alc turned on alc circuit specification alc turn on voltage point valcon -53 - - dbm notes 1, 2, 3, 4 alc operating range alcr 36 40 44 db notes 1, 4 alc saturation voltage valc 4.8 - - v notes 1, 5, 6 line amplifier specification voltage gain gainl - 3.5 - db volume buffer voltage gain gainv - 0 - db miscellaneous source current of rec amplifier ireco 200 400 600 m a f=1 khz, rreco=5 kohms vrec0=550 mvrms sch1, sch2 input voltage vsh 0.7 - 1 v dd vsl 0 - 0.3 v dd source current ioerah 6 8 12 ma vheras=2.5v sink current of heras pin ioeral 0.2 0.5 2 ma vheras=0.5v vref output voltage vref 2.4 2.5 2.6 v notes: 1. refer to test circuit 2. dbm: decibels referenced to one milliwatt into a 600 ohms load. 3. external sine wave signal connected to head, linei, or mic input pin. 4. com-amplifier output voltage = 470 ~ 620 mvrms 5. load resistance of alc pin is 68 kohms. 6. -27 dbm sine wave signal connected to linei, mic, head input pins.
17 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary parameter sym. min. typ. max. unit condition power amplifier (pvdd= 5v, rl = 8ohm) power supply voltage pvdd 4.5 5 5.5 v voltage gain av - 60 - db 1khz bandwidth bw - - 1 mhz power supply rejection ratio psrr - 60 - db 1khz total harmonic distortion thd - 0.5 1 % i lp-p = 150ma,1khz output voltage swing vo 3.2 - 4 vpp |vo1-vo2| vo1, vo2 offset voltage vo 1-2 -20- mv quiescent current i q -3- ma v in =0v output current p out - - 250 mw thd=10% short circuit current i s (max) - 400 - ma dtmf receiver gain setting amplifier power supply rejection ratio psrr - 60 - db 1 khz dc open loop voltage gain avol - 65 - db open loop unit gain banwidth fc - 1.5 - mhz 1 khz output voltage swing vo - 4.5 - vpp rl 3 100kohm to v ss valid input signal level v i -40 - - dbm (each tone signal) 7.75 - - mvrms - - +1 dbm - - 883 mvrms dual tone rwist accept tw - 10 - db acceptable frequency d f-- 1.5% - deviation 2hz frequency deviation reject d f r 3.5% - - - third tone tolerance t3rd - -16 - db noise tolerance t n - -12 - db dial tone tolerance dt - 18 - db crystal clock frequency fck 3.5759 3.5795 3.5831 mhz dtmf receiver timing tone present detection time t dp 51416ms tone absent detection time t da 0.5 4 8.5 ms tone duration accept t rec --40ms tone duration reject t rec 20 - - ms interdigit pause accept t id --40ms interdigit pause reject t id 20 - - ms propagation delay (st to q) t pq -811 m s propagation delay (st to std) t psed -12 - m s
18 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary frequency response (1khz, 0db, alc off) testing path : signal (1khz) ? mic input ? amp output ? rec. output ? tape (deck type : mec. ml- 756) ? head input ? amp output s/n - 34 - db 300 hz - -7.5 - db 3 khz - -7 - db test circuit db meter signal ac 3 1 2 4 sw2 c1 1uf 3 1 2 sw1 vssa u1 EM73475 vdda vdd vdda linei mic head reco lineo r3 470 r2 24k c6 152 ampnf ampo alc v s s a v s s d t e s t vdd 1 2 d1 1n4148 vdda c3 0.1uf c4 20pf c5 20pf y1 4.19mhz vssa vssa c8 22uf r5 68k c7 2.2uf reset xout xin note : 1. dbm = decibels above or below a reference power of 1mw into a 600 ohm load. 2. digit sequences consists of all 16 dtmf tones. 3. tone duration = 10ms; tone pause = 40ms. 4. nominal dtmf frequencies are used. 5. both tones in the composite signal have an equal amplitude. 6. tone pair is deviated by 1.5% 2hz. 7. bandwidth limited (3khz) gaussian noise. 8. the precise dial tone frequencies are (350hz and 440hz) 2%. 9. for an error rate of less than 1 in 10,000. 10. referenced to the lowest level frequency component in dtmf signal. 11. added a 0.1 m f capacitor between v dd and v ss .
19 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary application circuit(1) EM73475 display key board diode option pinger detect line circuit power motor control photo detect dc 5 - 9 v dc 5 - 9 v dc 5 v dc 5 v dtmf receiver power amplifier vo1 vo2 speaker 8ohm/0.25w
20 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary application circuit(2) melody ampnf ampo alc vref pvdd vo1 vo2 pvss reco head heras linei lineo mic gs dtmfin p7.1 p7.0 p8.3 p8.2 p8.1 p8.0 p9.2 p9.1 p9.0 p1-p2 wakeup reset xout xin vssa vss vdda vdd test EM73475 100k 470 152 24k 2.2? 1? 22? + 1? 22? 2.2? 1? + + + + + + 68k alc ampo ampnf melody prhd erhd hd erase 103 15k 1k 150 2k2 150k 150k 103 dtmf 104 vdda vdd 104 vdda 100 100? 0.47? 4k7 mic. mic 680 vdd 1n4148 20pf 20pf 3.58mhz 0.1? 1? + + + + pvdd pvss speaker 8 ohms
21 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary application circuit(3) dc jack 1n4004 470? + vim in out gnd 100? 100? 100? pvdd pvss vdd vssa 47? + + vdda lm7805ct 2 3 wakeup linei lineo p8.3 + + + + 220? 1? 1? 100? 100k c1815 4k7 a42 2k2 680 33 82 180k 15k 103 c1815 c1815 100k dtmf 6k8 2k2 100k 22m 22k a92 1k 4v7 1n4004*4 220k pc817 vdd 47k 1n4004 27v 27v 0.47?250v 10? znr 10? fuse rj11c rj11c line circuit 2 1 1 3 4 vlin 1n4148 68k a1015 c1815 p7.1 33k vdd 680k 47k + 1? 4v7 on off cpc vlin ringer detect power
22 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary application circuit(4) a b c d e f g p 7 6 4 2 1 9 10 5 dc motor vim vim 3 p9.2 1k5 1k5 1k5 1k5 c1815 c1815 c1815 c1815 1k2 b564 b564 ka2404 d471 d471 2 1 1n4148 1n4148 1k2 22k p9.0 c1815 a1015 a1015 34 2 1 22k p9.1 2k7 220 300 100 180 vdd 150k 680 anode phodet 100p p8.2 10k vdd 3 8 a5018 1k5*8 8 7 6 5 1 2 3 4 1. icm len 2. ogm len 3. deck type 4. 2 way beep | + sw p1.0 p1.1 p1.2 p1.3 560k*4 1n4148*4 p1.0 p1.1 p1.2 p1.3 p2.0 p2.1 p2.2 p2.3 msg ogm memo code on/off stop up down p1.0 p1.1 p1.2 p1.3 p2.0 p2.1 p2.2 p2.3 1n4148*8 10k p7.0 2 ts 4 p1.0 p1.1 p1.2 p1.3 hook no yes msg ring photo detect key board/diode option display motor control p8.1 10k
23 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary padno. symbol x y 1 ampnf 711.1 1381.7 2 ampo 560.5 1381.7 3 alc 411.2 1381.7 4 reco 255.2 1381.7 res 110.7 1381.7 muterc -45.2 1381.7 5 lineo -1727.7 1403.6 6 gs -1727.7 1256.6 7 dtmfin -1731.6 1108.5 8 vddp -1768.7 800.1 9 vo1 -1768.7 326.5 10 gndp -1768.7 -1.5 11 vo2 -1768.7 -329.5 12 gnd -1742.0 -829.7 12 gnd -1742.0 -963.0 12 gnd -1742.0 -1100.9 13 p1.0 -1776.7 -1289.6 14 p1.1 -1462.8 -1428.2 15 p1.2 -1252.9 -1428.2 16 p1.3 -1031.7 -1428.2 pad diagram chip size : 3880 m m x 3170 m m 5 6 7 8 9 10 11 12 12 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 38 39 40 41 42 1 2 3 4 ampnf ampo alc reco vref vdd vdd head mic linei lineo gs d tmfin vddp vo1 gndp vo2 gnd gnd gnd p1.0 p1.1 p1.2 p1.3 p7.0 p7.1 p2.0 p2.1 p7.2 p7.3 p2.2 p2.3 text xin xout reset wakeup sch1 sch2 p8.1 p8.2 p8.3 p9.0 p9.1 p9.2 vdd phodet heras melody (0,0) EM73475 res muterc
24 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary unit : m m note : for pcb layout, ic substrate must be floated, or connect to v ss . padno. symbol x y 17 p7.0 -810.9 -1429.0 18 p7.1 -601.9 -1429.0 19 p2.0 -385.5 -1428.4 20 p2.1 -194.8 -1383.4 p7.2 -37.9 -1393.0 p7.3 113.6 -1393.0 21 p2.2 280.8 -1383.4 22 p2.3 421.8 -1383.4 23 test 583.3 -1373.2 24 xin 914.1 -1373.2 25 xout 1061.1 -1371.5 26 reset 1271.9 -1386.3 27 wakeup 1429.4 -1386.3 sch1 1584.0 -1382.8 sch2 1735.2 -1382.8 28 p8.1 1729.8 -1042.8 29 p8.2 1729.8 -879.6 30 p8.3 1729.8 -719.8 31 p9.0 1729.8 -575.4 32 p9.1 1729.8 -413.4 33 p9.2 1729.8 -268.9 34 vdd 1731.5 -117.2 35 phodet 1729.8 33.1 36 heras 1731.2 179.2 37 melody 1729.8 341.9 38 vdd 1685.0 1373.7 39 vref 1301.4 1381.7 40 head 1150.7 1381.7 41 mic 1006.3 1381.7 42 linei 855.6 1381.7
25 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary instruction table (1) data transfer mnemonic object code ( binary ) operation description byte cycle flag cz s lda x 0110 1010 xxxx xxxx acc ? ram[x] 2 2 - z 1 ldam 0101 1010 acc ? ram[hl] 1 1 - z 1 ldax 0110 0101 acc ? rom[dp] l 12-z1 ldaxi 0110 0111 acc ? rom[dp] h ,dp+1 1 2 - z 1 ldh #k 1001 kkkk hr ? k11--1 ldhl x 0100 1110 xxxx xx00 lr ? ram[x],hr ? ram[x+1] 2 2 - - 1 ldia #k 1101 kkkk acc ? k11-z1 ldl #k 1000 kkkk lr ? k11--1 sta x 0110 1001 xxxx xxxx ram[x] ? acc 2 2 - - 1 stam 0101 1001 ram[hl] ? acc 1 1 - - 1 stamd 0111 1101 ram[hl] ? acc, lr-1 1 1 - z c stami 0111 1111 ram[hl] ? acc, lr+1 1 1 - z c' std #k,y 0100 1000 kkkk yyyy ram[y] ? k22--1 stdmi #k 1010 kkkk ram[hl] ? k, lr+1 1 1 - z c' tha 0111 0110 acc ? hr 1 1 - z 1 tla 0111 0100 acc ? lr 1 1 - z 1 (2) rotate mnemonic object code ( binary ) operation description byte cycle flag czs rlca 0101 0000 ? cf ? acc ? 11czc' rrca 0101 0001 ? cf ? acc ? 11czc' ( 3) arithmetic operation mnemonic object code ( binary ) operation description byte cycle flag c zs adcam 0111 0000 acc ? acc + ram[hl] + cf 1 1 c z c' add #k,y 0100 1001 kkkk yyyy ram[y] ? ram[y] +k 2 2 - z c' adda #k 0110 1110 0101 kkkk acc ? acc+k 2 2 - z c' addam 0111 0001 acc ? acc + ram[hl] 1 1 - z c' addh #k 0110 1110 1001 kkkk hr ? hr+k 2 2 - z c' addl #k 0110 1110 0001 kkkk lr ? lr+k 2 2 - z c' addm #k 0110 1110 1101 kkkk ram[hl] ? ram[hl] +k 2 2 - z c' deca 0101 1100 acc ? acc-1 1 1 - z c decl 0111 1100 lr ? lr-1 1 1 - z c decm 0101 1101 ram[hl] ? ram[hl] -1 1 1 - z c inca 0101 1110 acc ? acc + 1 1 1 - z c'
26 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary incl 0111 1110 lr ? lr + 1 1 1 - z c' incm 0101 1111 ram[hl] ? ram[hl]+1 1 1 - z c' suba #k 0110 1110 0111 kkkk acc ? k-acc 2 2 - z c sbcam 0111 0010 acc ? ram[hll - acc - cf' 1 1 c z c subm #k 0110 1110 1111 kkkk ram[hl] ? k - ram[hl] 2 2 - z c ( 4) logical operation mnemonic object code ( binary ) operation description byte cycle flag czs anda #k 0110 1110 0110 kkkk acc ? acc&k 2 2 - z z' andam 0111 1011 acc ? acc & ram[hl] 1 1 - z z' andm #k 0110 1110 1110 kkkk ram[hl] ? ram[hl]&k 2 2 - z z' ora #k 0110 1110 0100 kkkk acc ? acc k 2 2 - z z' oram 0111 1000 acc ? acc ram[hl] 1 1 - z z' orm #k 0110 1110 1100 kkkk ram[hl] ? ram[hl] k 2 2 - z z' xoram 0111 1001 acc ? acc^ram[hl] 1 1 - z z' (5) exchange mnemonic object code ( binary ) operation description byte cycle flag czs exa x 0110 1000 xxxx xxxx acc ? ram[x] 2 2 - z 1 exah 0110 0110 acc ? hr 1 2 - z 1 exal 0110 0100 acc ? lr 1 2 - z 1 exam 0101 1000 acc ? ram[hl] 1 1 - z 1 exhl x 0100 1100 xxxx xx00 lr ? ram[x], hr ? ram[x+1] 2 2 - - 1 (6) branch mnemonic object code ( binary ) operation description byte cycle flag czs sbr a 00aa aaaa if sf=1 then pc ? pc 12-6 .a 5-0 11--1 else null lbr a 1100 aaaa aaaa aaaa if sf= 1 then pc ? a else null 2 2 - - 1 slbr a 0101 0101 1100 aaaa if sf=1 then pc ? a else null 3 3 - - 1 aaaa aaaa (a:1000~1fffh) 0101 0111 1100 aaaa aaaa aaaa (a:0000~0fffh) (7) compare mnemonic object code ( binary ) operation description byte cycle flag czs cmp #k,y 0100 1011 kkkk yyyy k-ram[y] 2 2 c z z' cmpa x 0110 1011 xxxx xxxx ram[x]-acc 2 2 c z z' - - - - - -
27 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary mnemonic object code ( binary ) operation description byte cycle flag czs cmpam 0111 0011 ram[hl] - acc 1 1 c z z' cmph #k 0110 1110 1011 kkkk k - hr 2 2 - z c cmpia #k 1011 kkkk k - acc 1 1 c z z' cmpl #k 0110 1110 0011 kkkk k-lr 2 2 - z c (8) bit manipulation mnemonic object code ( binary ) operation description byte cycle flag czs clm b 1111 00bb ram[hl] b ? 011--1 clp p,b 0110 1101 11bb pppp port[p] b ? 022--1 clpl 0110 0000 port[lr 3-2 +4] lr 1-0 ? 012--1 clr y,b 0110 1100 11bb yyyy ram[y] b ? 022--1 sem b 1111 01bb ram[hl] b ? 111--1 sep p,b 0110 1101 01bb pppp port[p] b ? 122--1 sepl 0110 0010 port[lr 3-2 +4] lr l-0 ? 112 --1 set y,b 0110 1100 01bb yyyy ram[y] b ? 122--1 tf y,b 0110 1100 00bb yyyy sf ? ram[y] b '22--* tfa b 1111 10bb sf ? acc b '11--* tfm b 1111 11bb sf ? ram[hl] b '11--* tfp p,b 0110 1101 00bb pppp sf ? port[p] b '22--* tfpl 0110 0001 sf ? port[lr 3-2 +4] lr 1-0 '1 2--* tt y,b 0110 1100 10bb yyyy sf ? ram[y] b 22--* ttp p,b 0110 1101 10bb pppp sf ? port[p] b 22--* (9) subroutine mnemonic object code ( binary ) operation description byte cycle flag czs lcall a 0100 0aaa aaaa aaaa stack[sp] ? pc, 2 2 - - - sp ? sp -1, pc ? a scall a 1110 nnnn stack[sp] ? pc, 1 2 - - - sp ? sp - 1, pc ? a, a = 8n + 6 (n =1~15 ),0086h (n = 0) ret 0100 1111 sp ? sp + 1, pc ? stack[sp] 1 2 - - - (10) input/output mnemonic object code ( binary ) operation description byte cycle flag czs ina p 0110 1111 0100 pppp acc ? port[p] 2 2 - z z' inm p 0110 1111 1100 pppp ram[hl] ? port[p] 2 2 - - z' out #k,p 0100 1010 kkkk pppp port[p] ? k22--1 outa p 0110 1111 000p pppp port[p] ? acc 2 2 - - 1 outm p 0110 1111 100p pppp port[p] ? ram[hl] 2 2 - - 1 out12 0111 0111 port[2].port[1] ? 12--1 rom[fe0h+cf.ram[hl]]
28 EM73475 4-bit micro-controller for telecom product * this specification are subject to be changed without notice. 8.1.1998 preliminary preliminary preliminary preliminary preliminary mnemonic object code ( binary ) operation description byte cycle flag czs tfcfc 0101 0011 sf ? cf', cf ? 0110-* ttcfs 0101 0010 sf ? cf, cf ? 1111-* tzs 0101 1011 sf ? zf 1 1 - - * (12) interrupt control mnemonic object code ( binary ) operation description byte cycle flag czs cil r 0110 0011 11rr rrrr il ? il & r 2 2 - - 1 dicil r 0110 0011 10rr rrrr eif ? 0,il ? il&r 2 2 - - 1 eicil r 0110 0011 01rr rrrr eif ? 1,il ? il&r 2 2 - - 1 exae 0111 0101 mask ? acc 1 1 - - 1 rti 0100 1101 sp ? sp+1,flag.pc 1 2 * * * ? stack[sp],eif ?1 (13) cpu control mnemonic object code ( binary ) operation description byte cycle flag czs nop 0101 0110 no operation 1 1 - - - (14) timer/counter & data pointer & stack pointer control mnemonic object code ( binary ) operation description byte cycle flag czs ldadpl 0110 1010 1111 1100 acc ? [dp] l 22-z1 ldadpm 0110 1010 1111 1101 acc ? [dp] m 22-z1 ldadph 0110 1010 1111 1110 acc ? [dp] h 22-z1 ldasp 0110 1010 1111 1111 acc ? sp 2 2 - z 1 ldatal 0110 1010 1111 0100 acc ? [ta] l 22-z1 ldatam 0110 1010 1111 0101 acc ? [ta] m 22-z1 ldatah 0110 1010 1111 0110 acc ? [ta] h 22 -z1 ldatbl 0110 1010 1111 1000 acc ? [tb] l 22-z1 ldatbm 0110 1010 1111 1001 acc ? [tb] m 22-z1 ldatbh 0110 1010 1111 1010 acc ? [tb] h 22-z1 stadpl 0110 1001 1111 1100 [dp] l ? acc 2 2 - - 1 stadpm 0110 1001 1111 1101 [dp] m ? acc 2 2 - - 1 stadph 0110 1001 1111 1110 [dp] h ? acc 2 2 - - 1 stasp 0110 1001 1111 1111 sp ? acc 2 2 - - 1 statal 0110 1001 1111 0100 [ta] l ? acc 2 2 - - 1 statam 0110 1001 1111 0101 [ta] m ? acc 2 2 - - 1 statah 0110 1001 1111 0110 [ta] h ? acc 2 2 - - 1 statbl 0110 1001 1111 1000 [ tb] l ? acc 2 2 - - 1 statbm 0110 1001 1111 1001 [tb] m ? acc 2 2 - - 1 statbh 0110 1001 1111 1010 [tb] h ? acc 2 2 - - 1 (11) flag manipulation
29 * this specification are subject to be changed without notice. EM73475 4-bit micro-controller for telecom product 8.1.1998 preliminary preliminary preliminary preliminary preliminary **** symbol description symbol description symbol description hr h register lr l register pc program counter dp data pointer sp stack pointer stack[sp] stack specified by sp a cc accumulator flag all flags cf carry flag zf zero flag sf status flag gf general flag ei enable interrupt register il interrupt latch mask interrupt mask port[p] port ( address : p ) ta timer/counter a tb timer/counter b ram[hl] data memory (address : hl ) ram[x] data memory (address : x ) rom[dp] l low 4-bit of program memory rom[dp] h high 4-bit of program memory [dp] l low 4-bit of data pointer register [dp] m middle 4-bit of data pointer register [dp] h high 4-bit of data pointer register [ta] l ([tb] l ) low 4-bit of timer/counter a (timer/counter b) register [ta] m ([tb] m ) middle 4-bit of timer/counter a [ta] h ([tb] h ) high 4-bit of timer/counter a (timer/counter b) register (timer/counter b) register ? transfer ? exchange + addition - substraction & logic and logic or ^ logic xor ' inverse operation . concatenation #k 4-bit immediate data x 8-bit ram address y 4-bit zero-page address p 4-bit or 5-bit port address b bit address r 6-bit interrupt latch pc 12-6 bit 12 to 6 of program counter lr 1 -0 contents of bit assigned by bit a 5-0 bit 5 to 0 of destination address for 1 to 0 of lr branch instruction lr 3-2 bit 3 to 2 of lr - -

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